A groundbreaking research paper co-authored by Guizhou University vice president Wang Xu’s research team and a team from the Shenzhen Institute for Quantum Science and Engineering of Southern University of Science and Technology (SUSTech) was published in Chip, a top international journal in infotech, in late 2023. Titled “Cooperative engineering the multiple radio-frequency fields to reduce the X-Junction barrier for ion trap chips”, the paper reports a method to cooperatively optimize the trapping potential field distribution near the junction electrode of the ion trap chip using multiple radio-frequency fields, in order to reduce the trapping potential barrier and anomalous phonon heating. Its first author and co-first author are GZU’s Liu Yarui and SUSTech’s Wang Zhao. The latter, alongside Professor Wang Xu, is also a corresponding author.

With the increasing number of ion qubits and improving performance of sophisticated quantum algorithms, more and more scalable complex ion trap electrodes have been developed and integrated. Nonlinear ion shuttling operations at the junction are more frequently used, such as in the areas of separation, merging, and exchanging. Studies have been conducted to optimize the geometries of the radio-frequency (RF) electrodes to generate ideal trapping electric fields with a lower junction barrier and an even ion height of the RF saddle points. However, this iteration is time-consuming and commonly accompanied by complicated and sharp electrode geometry. Therefore, high-accuracy fabrication process and high electric breakdown voltage are essential.

In this collaborative research by scientists from GZU and SUSTech, an effective method was proposed to reduce the junction’s pseudo-potential barrier and ion height variation by setting several individual RF electrodes and adjusting each RF voltage amplitude without changing the geometry of the electrode structure. The simulation results show that this method shows the same effect on engineering the trapping potential and reducing the potential barrier, but requires fewer parameters and optimization time. By combining this method with the geometrical shape-optimizing, the pseudo-potential barrier and the ion height variation near the junction can be further reduced. In addition, the geometry of the electrodes can be simplified to relax the fabrication precision and keep the ability to engineer the trapping electric field in real-time even after the fabrication of the electrodes, which provides a potential all-electric degree of freedom for the design and control of the two-dimensional ion crystals and investigation of their phase transition.

Chip (ISSN: 2772-2724, CN: 31-2189/O4), the journal publishing this research paper, is the only comprehensive international journal that focuses on semiconductor research. It has been included in the “High Starting Point New Journal Project of China Science and Technology Journal Excellence Action Plan” jointly implemented by the China Association for Science and Technology, the Chinese Academy of Sciences and multiple central government departments in China. The Ministry of Science and Technology in particular endorses it as a platform for publishing high-quality groundbreaking researches.

Editor: Pang Aizhong

Chief Editor: Zhan Chan

Senior Editor: Li Xufeng

Translator: Du Xiaorui